| Internet-Draft | SR Algorithm in PCEP | September 2023 |
| Sidor, et al. | Expires 23 March 2024 | [Page] |
The Algorithm associated with a prefix Segment-ID (SID) defines the path computation Algorithm used by Interior Gateway Protocols (IGPs). This information is available to controllers such as the Path Computation Element (PCE) via topology learning. This document proposes an approach for informing headend routers regarding the Algorithm associated with each prefix SID used in PCE-computed paths, as well as signalling a specific SR algorithm as a constraint to the PCE.¶
The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT", "SHOULD", "SHOULD NOT", "RECOMMENDED", "NOT RECOMMENDED", "MAY", and "OPTIONAL" in this document are to be interpreted as described in BCP 14 [RFC2119] [RFC8174] when, and only when, they appear in all capitals, as shown here.¶
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A PCE can compute SR-TE paths using SIDs with different Algorithms depending on the use-case, constraints, etc. While this information is available on the PCE, there is no method of conveying this information to the headend router.¶
Similarly, the headend can also compute SR-TE paths using different Algorithms, and this information also needs to be conveyed to the PCE for collection or troubleshooting purposes. In addition, in the case of multiple (redundant) PCEs, when the headend receives a path from the primary PCE, it needs to be able to report the complete path information - including the Algorithm - to the backup PCE so that in HA scenarios, the backup PCE can verify the prefix SIDs appropriately.¶
An operator may also want to constrain the path computed by the PCE to a specific SR Algorithm, for example, in order to only use SR Algorithms for a low-latency path. A new TLV is introduced for this purpose.¶
Refer to [RFC8665] and [RFC8667] for details about the prefix SR Algorithm.¶
This document is extending:¶
A new TLV for signalling SR Algorithm constraint to the PCE is also introduced, to be carried inside the LSPA object, which is defined in [RFC5440].¶
The mechanisms described in this document are equally applicable to both SR-MPLS and SRv6.¶
The following terminologies are used in this document:¶
A new flag S is proposed in the SR PCE Capability Sub-TLV introduced in Section 4.1.2 of [RFC8664] to indicate support for SR Algorithm. If S flag is set, PCEP peer indicates support for Algorithm field in SR-ERO Subject and SR Algorithm constraint only for Traffic-engineering paths with Segment Routing Path Setup Type. It is not indicating support for these extensions for other Path Setup Types.¶
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Type=26 | Length=4 | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Flags |S|N|X| MSD | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+¶
A new flag S is proposed in the SRv6 PCE Capability sub-TLV introduced in 4.1.1 of [I-D.ietf-pce-segment-routing-ipv6] to indicate support for SR Algorithm. If S flag is set, PCEP peer indicates support for Algorithm field in SRv6-ERO Subobject and SR Algorithm constraint only for Traffic-engineering paths with SRv6 Path Setup Type. It is not indicating support for these extensions for other Path Setup Types.¶
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Type=27 | Length | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Flags |S|N|X| +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | MSD-Type | MSD-Value | MSD-Type | MSD-Value | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ // ... // +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | MSD-Type | MSD-Value | Padding | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+¶
The SR-ERO subobject encoding is extended with new flag "A" to indicate if the Algorithm field is included after other optional fields.¶
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |L| Type=36 | Length | NT | Flags |A|F|S|C|M| +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | SID (optional) | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ // NAI (variable, optional) // +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Algorithm | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+¶
The SRv6-ERO subobject encoding is extended with new flag "A" to indicate if the Algorithm field is included after other optional fields.¶
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |L| Type=40 | Length | NT | Flags |A|V|T|F|S| +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Endpoint Behavior | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | | | SRv6 SID (optional) | | (128-bit) | | | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ // NAI (variable, optional) // +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | SID Structure (optional) | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Algorithm | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+¶
A new TLV for the LSPA Object with TLV type=66 is introduced to carry the SR Algorithm constraint. This TLV SHOULD only be used when PST (Path Setup type) = SR or SRv6. Only the first instance of this TLV SHOULD be processed, subsequent instances SHOULD be ignored¶
The format of the SR Algorithm TLV is as follows:¶
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Type=66 | Length=4 | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Reserved | Flags |F|S| Algorithm | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
The code point for the TLV type is 66. The TLV length is 4 octets.¶
The 32-bit value is formatted as follows.¶
This document defines the following flag bits. The other bits MUST be set to zero by the sender and MUST be ignored by the receiver.¶
The METRIC object is defined in Section 7.8 of [RFC5440] This document defines the following types for the METRIC object.¶
[RFC7471] and [RFC8570] defined as "Min Unidirectional Link Delay". The Min Link Delay metric represents measured minimum link delay value over a configurable interval.¶
The Path Min Delay metric type of the METRIC object in PCEP represents the sum of the Min Link Delay metric of all links along a P2P path.¶
The P2MP Path Min Delay metric type of the METRIC object in PCEP encodes the Path Min Delay metric for the destination that observes the worst delay metric among all destinations of the P2MP tree.¶
[RFC7471] and [RFC8570] define "Min/Max Unidirectional Link Delay Sub-TLV" to advertise the link minimum and maximum delay in microseconds in a 24-bit field.¶
[RFC5440] defines the METRIC object with a 32-bit metric value encoded in IEEE floating point format.¶
The encoding for the Path Min Delay metric value is quantified in units of microseconds and encoded in IEEE floating point format.¶
The conversion from 24-bit integer to 32-bit IEEE floating point could introduce some loss of precision.¶
The PCEP protocol extensions defined in Sections 3.2, 3.3 and 3.4 of this draft MUST NOT be used if one or both PCEP speakers have not indicated the support using S flag in Path Setup Type specific Sub-TLVs in their respective OPEN messages.¶
PCEP speaker MAY set the A flag and include the Algorithm field in SR-ERO or SRv6-ERO subobject if the S flag was advertised by both PCEP speakers.¶
If PCEP peer receives SR-ERO subobject with the A flag set or with the SR Algorithm included, but the S flag was not advertised, then it MUST consider entire ERO as invalid as described in Section 5.2.1 of [RFC8664]¶
The Algorithm field MUST be included after optional SID, NAI or SID structure and length of SR-ERO or SRv6-ERO subobject MUST be increased with additional 4 bytes for Reserved and Algorithm field.¶
If the length and the A flag are not consistent, it MUST consider the entire ERO invalid and MUST send a PCErr message with Error-Type = 10 ("Reception of an invalid object") and Error-value = 11 ("Malformed object").¶
In order to signal a specific SR Algorithm constraint to the PCE, the headend MUST encode the SR ALGORITHM TLV inside the LSPA object.¶
If PCEP peer receives LSPA object with SR ALGORITHM TLV in it, but the S flag was not advertised, then PCEP peer MUST ignore it as per Section 7.1 of [RFC5440].¶
Path computation MUST occur on the topology associated with specified SR algorithm. The PCE MUST NOT use Prefix SIDs of SR Algorithm other than specified in algorithm constraint. It is allowed to use other SID types (e.g., Adjacency or Binding SID), but only from nodes participating in specified SR algorithm.¶
Specified Algorithm constraint is applied to end-to-end SR policy path. Using different Algorithm constraint in each domain or part of the topology in single path computation is out of scope of this document. One possible solution is to determine FAD mapping using PCE local policy.¶
If the PCE is unable to find a path with the given SR Algorithm constraint or it does not support combination of specified constraints, it MAY respond with empty path to indicate that it was not able to find valid path.¶
If headend is part of multiple IGP domains and winning FAD for specified SR Algorithm in each of them has different constraints, the PCE implementation MAY have local policy with defined behavior for selecting FAD for such path-computation or even completely not supporting it. It is RECOMMENDED to respond with empty path if such path-computation is not supported.¶
SR Algorithm does not replace the Objective Function defined in [RFC5541]¶
The PCE MUST follow IGP Flexible Algorithm path computation logic as described in [RFC9350]. That includes using same ordered rules to select FAD if multiple FADs are available, considering node participation of specified SR algorithm in the path computation, using ASLA specific link attributes and other rules for Flexible Algorithm path computation described in that document.¶
The PCE MUST optimize computed path based on metric type specified in the FAD, metric type included in PCEP messages from PCC MUST be ignored. The PCE SHOULD use metric type from FAD in messages sent to the PCC. If corresponding metric type is not defined in PCEP, PCE SHOULD skip encoding of metric object for optimization metric.¶
There are corresponding metric types in PCEP for IGP and TE metric from FAD introduced in [RFC9350], but there was no corresponding metric type defined for "Min Unidirectional Link Delay". Section 3.5 of this document is introducing it.¶
The PCE MUST use constraints specified in the FAD and also constraints directly included in PCEP messages from PCC. The PCE implementation MAY decide to ignore specific constraints received from PCC based on existing processing rules for PCEP Objects and TLVs, e.g. P flag described in Section 7.2 of [RFC5440] and processing rules described in [I-D.ietf-pce-stateful-pce-optional]. If the PCE does not support specified combination of constraints, it MAY respond with PCEP message with empty ERO. PCC MUST NOT include constraints from FAD in PCEP message sent to PCE as it can result in undesired behavior in various cases. PCE SHOULD NOT include constraints from FAD in PCEP messages sent to PCC.¶
The SR Algorithm constraint acts as a filter, restricting which SIDs may be used as a result of the path computation function. Path computation is done based on optimization metric type and constraints specified in PCEP message received from PCC.¶
If specified SR Algorithm is Flexible Algorithm, the PCE MUST ensure that IGP path of Flex-algo SIDs is congruant with computed path.¶
All the rules of processing the METRIC object as explained in [RFC5440] and [RFC8233] are applicable to new metric types defined in this document.¶
List of remaining items tracked for future draft versions, which requires more discussion.¶
No additional security measure is required.¶
IANA maintains a sub-registry, named "SR Capability Flag Field", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of the SR-PCE-CAPABILITY TLV. IANA is requested to make the following assignment:¶
| Bit | Description | Reference |
|---|---|---|
| 5 | SR Algorithm Capability | This document |
IANA was requested in [I-D.ietf-pce-segment-routing-ipv6] to create a sub-registry, named "SRv6 PCE Capability Flags", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of SRv6-PCE-CAPABILITY sub-TLV. IANA is requested to make the following assignment:¶
| Bit | Description | Reference |
|---|---|---|
| TBD1 | SR Algorithm Capability | This document |
IANA maintains a sub-registry, named "SR-ERO Flag Field", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of the SR-ERO Subobject. IANA is requested to make the following assignment:¶
| Bit | Description | Reference |
|---|---|---|
| 7 | SR Algorithm Flag | This document |
IANA was requested in [I-D.ietf-pce-segment-routing-ipv6], named "SRv6-ERO Flag Field", within the "Path Computation Element Protocol (PCEP) Numbers" registry to manage the Flags field of the SRv6-ERO subobject. IANA is requested to make the following assignment:¶
| Bit | Description | Reference |
|---|---|---|
| TBD2 | SR Algorithm Flag | This document |
IANA maintains a subregistry, named "PCEP TLV Type Indicators", within the "Path Computation Element Protocol (PCEP) Numbers" registry. IANA is requested to allocate a new TLV type for the new LSPA TLV specified in this document.¶
| Type | Description | Reference |
|---|---|---|
| 66 | SR algorithm | This document |
IANA maintains a subregistry for "METRIC Object T Field" within the "Path Computation Element Protocol (PCEP) Numbers" registry. IANA is requested to allocate a new values for metric types defined in this document:¶
| Type | Description | Reference |
|---|---|---|
| 22 | Path Min Delay Metric | This document |
| 23 | P2MP Path Min Delay Metric | This document |
Mike Koldychev Cisco Systems, Inc. Email: [email protected] Zafar Ali Cisco Systems, Inc. Email: [email protected] Stephane Litkowski Cisco Systems, Inc. Email: [email protected] Siva Sivabalan Ciena Email: [email protected] Tarek Saad Cisco Systems, Inc. Email: [email protected] Mahendra Singh Negi RtBrick Inc Email: [email protected]¶